forked from Mirrors/usk
revert some previous optimization changes, implement *proper* GRB to RGB conversion. these changes were on my mind for a while but they should fix error code display as well as have less jank error code indicators. rehius' usk was used as 'base' in this instance.
This commit is contained in:
DefenderOfHyrule
parent
9cce154f9c
commit
9e2544dbe3
8 changed files with 147 additions and 190 deletions
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@ -53,7 +53,7 @@ bool wait_for_boot(int timeout_ms) {
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else if (last_word == 0x51000000 && word == 0x0055) //read block 0
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{
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// OLED models sometimes need more time between block 0 and block 1
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// original was 100ms, increased to 250ms for (hopefully) better OLED compatibility
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// original was 100ms, increased to 250ms for better OLED compatibility
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tio_full = make_timeout_time_ms(250);
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was_read_zero = true;
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} else if (was_read_zero && last_word == 0x4D000200 && word == 0x00B1) // read status - erista only
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@ -69,9 +69,8 @@ bool wait_for_boot(int timeout_ms) {
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}
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// properly clean up all state machines before retrying
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// original deinit only disabled SM 0 and 1, but SM 2 (G_DAT0_SM) was left running
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pio_set_sm_mask_enabled(pio1, 0x7, false); // disable SM 0, 1, AND 2 (0x7 = 0b111)
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// SM 2 (G_DAT0_SM) must also be disabled (0x7 = 0b111 covers SM 0, 1, and 2)
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pio_set_sm_mask_enabled(pio1, 0x7, false);
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// clean up GPIO pins
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for (int i = PIN_CLK; i <= PIN_DAT; i++)
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2
config.h
2
config.h
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@ -1,7 +1,7 @@
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#include "hardware/flash.h"
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#define OFFSET_DIV 8
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#define OFFSET_MIN 6200
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#define OFFSET_MAX 6950
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#define OFFSET_MAX 6900
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#define VER_HI 2
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#define VER_LO 81
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9
glitch.c
9
glitch.c
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@ -65,8 +65,7 @@ void init_glitch_pio() {
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}
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void deinit_glitch_pio() {
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// original code only disabled SM 0 and 1 (mask 0x3 = 0b011)
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// SM 2 (G_DAT0_SM) is also used, so all 3 (mask 0x7 = 0b111) need to be disabled
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// SM 2 (G_DAT0_SM) is also used, so all 3 state machines need to be disabled (0x7 = 0b111)
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pio_set_sm_mask_enabled(pio1, 0x7, false);
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for (int i = PIN_CLK; i <= PIN_DAT; i++)
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{
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@ -136,14 +135,14 @@ int do_glitch(int delay, int width, int total_ms, int after_ms) {
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int tries = 0;
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// Green pulsing implementation.
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// Blue pulsing implementation.
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void inc_tries()
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{
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tries += 1;
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if(tries & 1)
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put_pixel(PIX_g);
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put_pixel(PIX_b);
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else
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put_pixel(PIX_gre);
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put_pixel(PIX_blu);
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}
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// random() for glitch offset array generation
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167
main.c
167
main.c
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@ -21,23 +21,24 @@
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bool write_payload();
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// optimized: increased voltage for better stability at higher clock
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// overclock to 200 MHz
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void init_system() {
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vreg_set_voltage(VREG_VOLTAGE_1_30);
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set_sys_clock_khz(200000, true);
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set_sys_clock_khz(200000, true);
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}
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// filled within "fast check" on eMMC init
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extern uint8_t cid_buf[17];
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void rewrite_payload()
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{
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put_pixel(PIX_whi);
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write_payload();
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put_pixel(PIX_gre);
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put_pixel(PIX_blu);
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// used to automatically rewrite payload when eMMC/console changes
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init_config(cid_buf + 1);
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}
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// optimized: reduced timeout and combined checks
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bool safe_test_voltage(int pin, float target, float range)
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{
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gpio_enable_input_output(pin);
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@ -49,28 +50,34 @@ bool safe_test_voltage(int pin, float target, float range)
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return voltage >= (target - range) && voltage <= (target + range);
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}
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// optimized: reduced timeout from 2500ms to 1500ms, faster convergence
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// test all ADC pins
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void self_test()
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{
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absolute_time_t tio_time = make_timeout_time_ms(1500);
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absolute_time_t tio_time = make_timeout_time_ms(2500);
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adc_init();
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uint8_t check_mask = 0; // bit flags: 0=rst, 1=cmd, 2=d0
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while (!time_reached(tio_time) && check_mask != 0x07) {
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if (!(check_mask & 0x01))
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check_mask |= safe_test_voltage(PIN_RST, 1.8f, 0.2f) ? 0x01 : 0;
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if (!(check_mask & 0x02))
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check_mask |= safe_test_voltage(PIN_CMD, 1.8f, 0.2f) ? 0x02 : 0;
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if (!(check_mask & 0x04))
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check_mask |= safe_test_voltage(PIN_DAT, 1.8f, 0.2f) ? 0x04 : 0;
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bool rst_ok = false, cmd_ok = false, d0_ok = false, clk_ok = false;
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while (!time_reached(tio_time)) {
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if (!rst_ok)
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rst_ok |= safe_test_voltage(PIN_RST, 1.8f, 0.2f);
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if (!cmd_ok)
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cmd_ok |= safe_test_voltage(PIN_CMD, 1.8f, 0.2f);
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if (!d0_ok)
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d0_ok |= safe_test_voltage(PIN_DAT, 1.8f, 0.2f);
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if (rst_ok && cmd_ok && d0_ok)
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break;
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}
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if(!(check_mask & 0x01))
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if(!rst_ok)
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{
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halt_with_error(0, 2);
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if(!(check_mask & 0x02))
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}
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if(!cmd_ok)
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{
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halt_with_error(1, 2);
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if(!(check_mask & 0x04))
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}
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if(!d0_ok)
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{
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halt_with_error(2, 2);
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}
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}
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extern bool was_self_reset;
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@ -79,125 +86,89 @@ int main()
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{
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// stop watchdog
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*(uint32_t*)(0x40058000 + 0x3000) = (1 << 30);
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// init board detection
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// init reset, mosfet and LED
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detect_board();
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// clocks & voltage
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init_system();
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init_system();
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// fuses counter
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init_fuses();
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// LED & glitch & emmc PIO
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upload_pio();
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if (is_tiny())
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{
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gpio_put(led_pin(), 0);
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sleep_us(50); // optimized: reduced from 100us
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sleep_us(100);
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put_pixel(0);
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sleep_us(50); // optimized: reduced from 100us
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sleep_us(100);
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}
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// check if this is the very first start
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if (watchdog_caused_reboot() && boot_try == 0)
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halt_with_error(1, 1);
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{
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halt_with_error(1, 1);
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}
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// is chip reset required
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bool force_button = detect_by_pull(1, 0, 1);
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// start LED
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put_pixel(PIX_gre);
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put_pixel(PIX_blu);
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// test pins
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self_test();
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// wait till the CPU has proper power & started reading the eMMC
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wait_for_boot(2490);
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wait_for_boot(2500);
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// ensure the BCT has not been overwritten by system update
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bool force_check = fast_check();
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was_self_reset = force_button || !is_configured(cid_buf + 1);
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// perform payload rewrite if required
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if (!force_check || was_self_reset) {
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rewrite_payload();
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}
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// setup the glitch trigger for Mariko
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if (mariko) {
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pio1->instr_mem[gtrig_pio_offset + 4] = pio_encode_nop();
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pio1->instr_mem[gtrig_pio_offset + 5] = pio_encode_nop();
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}
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// optimized: start with slightly lower width for faster convergence
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int width = 140;
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// start from some default width
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int width = 150;
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bool glitched = false;
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int offset = 0;
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// optimized: removed outer loop since it just repeats rewrite_payload
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// try saved records first
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for (int y = 0; (y < 2) && !glitched; y++) {
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int max_weight = -1;
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while (1) {
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offset = find_best_record(&max_weight);
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if (offset == -1)
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break;
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// optimized: reduced attempts from 3 to 2 for faster iteration
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glitched = glitch_try_offset(offset, &width, 2);
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if (glitched)
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break;
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}
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}
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// try random offsets if saved records failed
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if (!glitched) {
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for(int z = 0; (z < 2) && !glitched; z++) {
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prepare_random_array();
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for(int y = 0; y < OFFSET_CNT; y++)
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{
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offset = offsets_array[y];
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// optimized: reduced attempts from 4 to 3
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for (int full_try = 0; full_try < 2; full_try++) {
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// try saved records
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for (int y = 0; (y < 2) && !glitched; y++) {
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int max_weight = -1;
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while (1) {
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offset = find_best_record(&max_weight);
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if (offset == -1)
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break;
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// try glitch
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glitched = glitch_try_offset(offset, &width, 3);
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if (glitched)
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break;
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}
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}
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}
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// if still not glitched, try one more time with payload rewrite
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if (!glitched) {
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rewrite_payload();
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// one more attempt with saved records
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int max_weight = -1;
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for (int y = 0; (y < 3) && !glitched; y++) {
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offset = find_best_record(&max_weight);
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if (offset == -1)
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break;
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glitched = glitch_try_offset(offset, &width, 2);
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if (!glitched) {
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for(int z = 0; (z < 2) && !glitched; z++) {
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prepare_random_array();
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for(int y = 0; y < OFFSET_CNT; y++)
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{
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offset = offsets_array[y];
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glitched = glitch_try_offset(offset, &width, 4);
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if (glitched)
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break;
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}
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}
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}
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if (glitched) {
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if ((count_fuses() & 1) != boot_slot)
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{
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// finish update / rollback
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burn_fuse();
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}
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add_boot_record(offset);
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halt_with_error(0, 1);
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}
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if (full_try == 0) {
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rewrite_payload();
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}
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}
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if (glitched) {
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// ensure all glitching operations are complete
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sleep_us(100);
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// force success LED display
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put_pixel(0); // clear any previous LED state
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sleep_ms(50);
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put_pixel(PIX_whi); // show white success
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sleep_ms(200); // longer delay to ensure visibility
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if ((count_fuses() & 1) != boot_slot)
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{
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// finish update / rollback
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burn_fuse();
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}
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add_boot_record(offset);
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halt_with_error(0, 1);
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}
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// attempts limit
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halt_with_error(7, 3);
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}
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63
misc.c
63
misc.c
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@ -10,14 +10,13 @@
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extern int ws_pio_offset;
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// optimized: reduced timing constants for faster error signaling
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#define BLINK_TIME 500
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#define BLINK_TIME 700
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#define SHORT_TIME ( BLINK_TIME * 2 / 10 )
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#define SHORT_PAUSE_TIME ((BLINK_TIME - SHORT_TIME) / 2)
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#define LONG_TIME ( BLINK_TIME * 8 / 10 )
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#define LONG_PAUSE_TIME ((BLINK_TIME - LONG_TIME) / 2)
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#define PAUSE_BETWEEN 1500
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#define PAUSE_BEFORE 500
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#define PAUSE_BETWEEN 2000
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#define PAUSE_BEFORE 750
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#define CODE_REPEATS 3
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#define GPIO_OD PADS_BANK0_GPIO0_OD_BITS
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@ -26,7 +25,6 @@ extern int ws_pio_offset;
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typedef void nopar();
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// optimized: streamlined power down sequence
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void __not_in_flash_func(zzz)() {
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*(uint32_t*)(0x4000803C + 0x3000) = 1; // go to 12 MHz
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uint32_t * vreg = (uint32_t*)0x40064000;
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@ -34,27 +32,30 @@ void __not_in_flash_func(zzz)() {
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*(uint32_t*)0x40060000 = 0x00d1e000; // disable rosc
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vreg[0] = 1; // lowest possible power
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*(uint32_t*)0x40024000 = 0x00d1e000; // disable xosc
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while(1) __asm volatile("wfi"); // optimized: use WFI to save more power
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while(1);
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}
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// optimized: combined loop for faster execution
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void finish_pins_except_leds() {
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for(int pin = 0; pin <= 29; pin++) {
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for(int pin = 0; pin <= 29; pin += 1) {
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if (pin == led_pin() || pin == pwr_pin())
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continue;
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if (pin == PIN_GLI_PICO || pin == PIN_GLI_XIAO || pin == PIN_GLI_WS || pin == PIN_GLI_ITSY)
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{
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gpio_pull_down(pin);
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}
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else
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{
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gpio_disable_pulls(pin);
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}
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gpio_disable_input_output(pin);
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}
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}
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void finish_pins_leds() {
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if (!is_tiny())
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{
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gpio_disable_input_output(led_pin());
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}
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gpio_disable_input_output(pwr_pin());
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}
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@ -65,62 +66,50 @@ void halt_with_error(uint32_t err, uint32_t bits)
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pio_set_sm_mask_enabled(pio1, 0xF, false);
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set_sys_clock_khz(48000, true);
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vreg_set_voltage(VREG_VOLTAGE_0_95);
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if (bits != 1)
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{
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put_pixel(0);
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sleep_ms(PAUSE_BEFORE);
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}
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for(int j = 0; j < CODE_REPEATS; j++)
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{
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for(int i = 0; i < bits; i++)
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{
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bool is_long = err & (1 << (bits - i - 1));
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sleep_ms(is_long ? LONG_PAUSE_TIME : SHORT_PAUSE_TIME);
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bool success = bits == 1 && is_long == 0;
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put_pixel(success ? PIX_whi : PIX_red);
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if (success)
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put_pixel(PIX_whi);
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else
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put_pixel(PIX_red);
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sleep_ms(is_long ? LONG_TIME : success ? SHORT_TIME * 2 : SHORT_TIME);
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put_pixel(0);
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if (i != bits - 1 || j != CODE_REPEATS - 1)
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sleep_ms(is_long ? LONG_PAUSE_TIME : SHORT_PAUSE_TIME);
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if (i == bits - 1 && j != CODE_REPEATS - 1)
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sleep_ms(PAUSE_BETWEEN);
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}
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// first write case, do not repeat this kind of error code
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if (bits == 1)
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break;
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}
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finish_pins_leds();
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zzz();
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}
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// optimized: reduced LED delays for faster startup
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void put_pixel(uint32_t pixel_rgb)
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void put_pixel(uint32_t pixel_grb)
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{
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static bool led_enabled = false;
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if (is_pico())
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{
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gpio_init(led_pin());
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if (pixel_rgb) {
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if (pixel_grb) {
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gpio_set_dir(led_pin(), true);
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gpio_put(led_pin(), 1);
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}
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return;
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}
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uint8_t red = (pixel_rgb >> 16) & 0xFF;
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uint8_t green = (pixel_rgb >> 8) & 0xFF;
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uint8_t blue = pixel_rgb & 0xFF;
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uint32_t pixel_grb = (green << 16) | (red << 8) | blue;
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ws2812_program_init(pio0, 3, ws_pio_offset, led_pin(), 800000, true);
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if (!led_enabled && pwr_pin() != 31)
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{
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led_enabled = true;
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@ -128,40 +117,38 @@ void put_pixel(uint32_t pixel_rgb)
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gpio_set_drive_strength(pwr_pin(), GPIO_DRIVE_STRENGTH_12MA);
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gpio_set_dir(pwr_pin(), true);
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gpio_put(pwr_pin(), 1);
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sleep_us(100); // optimized: reduced from 200us
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sleep_us(200);
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}
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pio_sm_put_blocking(pio0, 3, pixel_grb << 8u);
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sleep_us(30); // optimized: reduced from 50us
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sleep_us(50);
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pio_sm_set_enabled(pio0, 3, false);
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if (!is_tiny())
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{
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gpio_init(led_pin());
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}
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}
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// optimized: direct register access
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void gpio_disable_input_output(int pin)
|
||||
{
|
||||
uint32_t pad_reg = 0x4001c000 + 4 + (pin << 2); // optimized: Use shift instead of multiply
|
||||
uint32_t pad_reg = 0x4001c000 + 4 + pin*4;
|
||||
*(uint32_t*)(pad_reg + 0x2000) = GPIO_OD;
|
||||
*(uint32_t*)(pad_reg + 0x3000) = GPIO_IE;
|
||||
}
|
||||
|
||||
void gpio_enable_input_output(int pin)
|
||||
{
|
||||
uint32_t pad_reg = 0x4001c000 + 4 + (pin << 2); // optimized: Use shift instead of multiply
|
||||
uint32_t pad_reg = 0x4001c000 + 4 + pin*4;
|
||||
*(uint32_t*)(pad_reg + 0x3000) = GPIO_OD;
|
||||
*(uint32_t*)(pad_reg + 0x2000) = GPIO_IE;
|
||||
}
|
||||
|
||||
// optimized: reduced delays for faster reset cycles
|
||||
void reset_cpu() {
|
||||
gpio_enable_input_output(PIN_RST);
|
||||
gpio_pull_up(PIN_RST);
|
||||
sleep_us(800); // optimized: reduced from 1000us
|
||||
sleep_us(1000);
|
||||
gpio_init(PIN_RST);
|
||||
gpio_set_dir(PIN_RST, true);
|
||||
sleep_us(1800); // decreased slightly for button detection stability
|
||||
sleep_us(2000);
|
||||
gpio_deinit(PIN_RST);
|
||||
gpio_disable_pulls(PIN_RST);
|
||||
gpio_disable_input_output(PIN_RST);
|
||||
|
|
|
|||
9
misc.h
9
misc.h
|
|
@ -1,8 +1,9 @@
|
|||
#define PIX_gre 0x16537e
|
||||
#define PIX_red 0xc90000
|
||||
#define PIX_whi 0xff9200
|
||||
#define RGB(r, g, b) (((g) << 16) | ((r) << 8) | (b))
|
||||
|
||||
#define PIX_g 0x6fa8dc
|
||||
#define PIX_blu RGB(0x16, 0x53, 0x7e) // blue (glitching)
|
||||
#define PIX_b RGB(0x6f, 0xa8, 0xdc) // light blue dim (glitch pulse)
|
||||
#define PIX_whi RGB(0xff, 0x92, 0x00) // amber/yellow (success + comparison)
|
||||
#define PIX_red RGB(0xc9, 0x00, 0x00) // red (error codes)
|
||||
|
||||
void put_pixel(uint32_t pixel_grb);
|
||||
|
||||
|
|
|
|||
50
payload.c
50
payload.c
|
|
@ -81,7 +81,7 @@ extern bool mariko;
|
|||
|
||||
static inline uint16_t crc_itu_t_byte(uint16_t crc, const uint8_t data)
|
||||
{
|
||||
return (crc << 8) ^ crc_itu_t_table[((crc >> 8) ^ data) & 0xff];
|
||||
return (crc << 8) ^ crc_itu_t_table[((crc >> 8) ^ data) & 0xff];
|
||||
}
|
||||
|
||||
uint16_t crc_itu_t(uint16_t crc, const uint8_t *buffer, size_t len)
|
||||
|
|
@ -91,9 +91,9 @@ uint16_t crc_itu_t(uint16_t crc, const uint8_t *buffer, size_t len)
|
|||
{
|
||||
crc_prepare_table();
|
||||
}
|
||||
while (len--)
|
||||
crc = crc_itu_t_byte(crc, *buffer++);
|
||||
return crc;
|
||||
while (len--)
|
||||
crc = crc_itu_t_byte(crc, *buffer++);
|
||||
return crc;
|
||||
}
|
||||
|
||||
extern void zzz();
|
||||
|
|
@ -108,18 +108,18 @@ uint16_t payload_crc()
|
|||
|
||||
int crc7(uint8_t *buffer, int size)
|
||||
{
|
||||
uint8_t crc = 0;
|
||||
for (int i = 0; i < size; i++) {
|
||||
uint8_t c = buffer[i];
|
||||
for (int j = 0; j < 8; j++) {
|
||||
crc <<= 1;
|
||||
if ((crc ^ c) & 0x80)
|
||||
crc ^= 9;
|
||||
c <<= 1;
|
||||
}
|
||||
crc &= 0x7Fu;
|
||||
}
|
||||
return crc;
|
||||
uint8_t crc = 0;
|
||||
for (int i = 0; i < size; i++) {
|
||||
uint8_t c = buffer[i];
|
||||
for (int j = 0; j < 8; j++) {
|
||||
crc <<= 1;
|
||||
if ((crc ^ c) & 0x80)
|
||||
crc ^= 9;
|
||||
c <<= 1;
|
||||
}
|
||||
crc &= 0x7Fu;
|
||||
}
|
||||
return crc;
|
||||
}
|
||||
|
||||
void __time_critical_func(cmd_write)(uint8_t cmd, uint32_t argument)
|
||||
|
|
@ -130,9 +130,9 @@ void __time_critical_func(cmd_write)(uint8_t cmd, uint32_t argument)
|
|||
pio_sm_set_out_pins(pio0, SM_OUT, PIN_CMD, 1);
|
||||
pio_sm_set_enabled(pio0, SM_OUT, true);
|
||||
|
||||
data[0] = cmd | 0x40;
|
||||
*(uint32_t *) &data[1] = __builtin_bswap32(argument);
|
||||
data[5] = (crc7(data, 5) << 1) | 1;
|
||||
data[0] = cmd | 0x40;
|
||||
*(uint32_t *) &data[1] = __builtin_bswap32(argument);
|
||||
data[5] = (crc7(data, 5) << 1) | 1;
|
||||
uint32_t fifo[3];
|
||||
fifo[0] = 0xFFCF0000 | (data[0] << 8) | data[1];
|
||||
fifo[1] = __builtin_bswap32(*(uint32_t*)(data + 2));
|
||||
|
|
@ -151,7 +151,7 @@ bool __time_critical_func(dat_write)()
|
|||
pio_sm_set_out_pins(pio0, SM_OUT, PIN_DAT, 1);
|
||||
pio_sm_set_enabled(pio0, SM_OUT, true);
|
||||
uint8_t * buffer = data_buf;
|
||||
uint16_t crc = crc_itu_t(0, buffer, 512);
|
||||
uint16_t crc = crc_itu_t(0, buffer, 512);
|
||||
uint32_t words[130];
|
||||
int size_bits = 514 * 8 + 2;
|
||||
words[0] = ((size_bits ^ 0xFFFF) << 16) | (buffer[0] << 7) | (buffer[1] >> 1);
|
||||
|
|
@ -413,13 +413,13 @@ uint32_t mmc_init_table[] = {
|
|||
};
|
||||
|
||||
bool mmc_initialize() {
|
||||
if (!init_op_cond()) {
|
||||
if (!init_op_cond()) {
|
||||
return false;
|
||||
}
|
||||
if (!cmd_exec_cid()) {
|
||||
return false;
|
||||
}
|
||||
for (int i = 0; i < sizeof(mmc_init_table)/sizeof(mmc_init_table[0]); i += 4)
|
||||
for (int i = 0; i < sizeof(mmc_init_table)/sizeof(mmc_init_table[0]); i += 4)
|
||||
{
|
||||
uint32_t res= 0;
|
||||
if (!simple_cmd_exec_with_ret(mmc_init_table[i], mmc_init_table[i+1], &res)) {
|
||||
|
|
@ -495,9 +495,9 @@ extern int boot_slot;
|
|||
uint8_t temp_buf[512];
|
||||
|
||||
struct fw_header {
|
||||
uint32_t size;
|
||||
uint32_t crc;
|
||||
uint8_t data[];
|
||||
uint32_t size;
|
||||
uint32_t crc;
|
||||
uint8_t data[];
|
||||
};
|
||||
|
||||
#define fw_slot_0 ((struct fw_header *) (XIP_BASE + 0x10000))
|
||||
|
|
|
|||
Loading…
Reference in a new issue