forked from Mirrors/usk
Update main.c (#7)
back to 200mhz remove SRAM powerdown, abal1000x says, it spoils sleep
This commit is contained in:
parent
1a39e9b46d
commit
d2fae0f934
4 changed files with 6 additions and 16 deletions
6
config.h
6
config.h
|
|
@ -1,10 +1,10 @@
|
||||||
#include "hardware/flash.h"
|
#include "hardware/flash.h"
|
||||||
#define OFFSET_DIV 10
|
#define OFFSET_DIV 10
|
||||||
#define OFFSET_MIN 9200
|
#define OFFSET_MIN 6200
|
||||||
#define OFFSET_MAX 10300
|
#define OFFSET_MAX 6900
|
||||||
|
|
||||||
#define VER_HI 2
|
#define VER_HI 2
|
||||||
#define VER_LO 74
|
#define VER_LO 75
|
||||||
|
|
||||||
bool is_configured();
|
bool is_configured();
|
||||||
void init_config();
|
void init_config();
|
||||||
|
|
|
||||||
4
main.c
4
main.c
|
|
@ -21,10 +21,10 @@
|
||||||
|
|
||||||
bool write_payload();
|
bool write_payload();
|
||||||
|
|
||||||
// overclock to 300 MHz
|
// overclock to 200 MHz
|
||||||
void init_system() {
|
void init_system() {
|
||||||
vreg_set_voltage(VREG_VOLTAGE_1_30);
|
vreg_set_voltage(VREG_VOLTAGE_1_30);
|
||||||
set_sys_clock_khz(300000, true);
|
set_sys_clock_khz(200000, true);
|
||||||
}
|
}
|
||||||
|
|
||||||
// filled within "fast check" on eMMC init
|
// filled within "fast check" on eMMC init
|
||||||
|
|
|
||||||
10
misc.c
10
misc.c
|
|
@ -23,23 +23,13 @@ extern int ws_pio_offset;
|
||||||
#define GPIO_IE PADS_BANK0_GPIO0_IE_BITS
|
#define GPIO_IE PADS_BANK0_GPIO0_IE_BITS
|
||||||
#define GPIO_OD_PD (GPIO_OD | PADS_BANK0_GPIO0_PDE_BITS)
|
#define GPIO_OD_PD (GPIO_OD | PADS_BANK0_GPIO0_PDE_BITS)
|
||||||
|
|
||||||
#define PTR_SAFE_RAM4 (void*)0x20040200
|
|
||||||
|
|
||||||
typedef void nopar();
|
typedef void nopar();
|
||||||
|
|
||||||
void __not_in_flash_func(zzz)() {
|
void __not_in_flash_func(zzz)() {
|
||||||
static bool not_first = 0;
|
|
||||||
if(!not_first)
|
|
||||||
{
|
|
||||||
not_first = 1;
|
|
||||||
memcpy(PTR_SAFE_RAM4, (void*)((uint32_t)zzz - 1), 0x200);
|
|
||||||
((nopar*)(PTR_SAFE_RAM4 + 1))();
|
|
||||||
}
|
|
||||||
*(uint32_t*)(0x4000803C + 0x3000) = 1; // go to 12 MHz
|
*(uint32_t*)(0x4000803C + 0x3000) = 1; // go to 12 MHz
|
||||||
uint32_t * vreg = (uint32_t*)0x40064000;
|
uint32_t * vreg = (uint32_t*)0x40064000;
|
||||||
vreg[1] &= ~1; // disable brownout
|
vreg[1] &= ~1; // disable brownout
|
||||||
*(uint32_t*)0x40060000 = 0x00d1e000; // disable rosc
|
*(uint32_t*)0x40060000 = 0x00d1e000; // disable rosc
|
||||||
*(uint32_t*)0x40004018 = 0xFF ^ (1 << 4); // disable SRAMs except ours
|
|
||||||
vreg[0] = 1; // lowest possible power
|
vreg[0] = 1; // lowest possible power
|
||||||
*(uint32_t*)0x40024000 = 0x00d1e000; // disable xosc
|
*(uint32_t*)0x40024000 = 0x00d1e000; // disable xosc
|
||||||
while(1);
|
while(1);
|
||||||
|
|
|
||||||
|
|
@ -44,7 +44,7 @@ void upload_pio()
|
||||||
dsniff_pio_offset = pio_add_program(pio1, &glitch_dat_waiter_program);
|
dsniff_pio_offset = pio_add_program(pio1, &glitch_dat_waiter_program);
|
||||||
pio1->sm[G_DAT0_SM].shiftctrl = c.shiftctrl;
|
pio1->sm[G_DAT0_SM].shiftctrl = c.shiftctrl;
|
||||||
// set y to amount of data ticks to skip
|
// set y to amount of data ticks to skip
|
||||||
val = 528 * 300 / 25;
|
val = 528 * 200 / 25;
|
||||||
for (int i = 5; i >= 0; i--) {
|
for (int i = 5; i >= 0; i--) {
|
||||||
pio_sm_exec(pio1, G_DAT0_SM, pio_encode_set(pio_y, (val >> i*4) & 15));
|
pio_sm_exec(pio1, G_DAT0_SM, pio_encode_set(pio_y, (val >> i*4) & 15));
|
||||||
pio_sm_exec(pio1, G_DAT0_SM, pio_encode_in(pio_y, 4));
|
pio_sm_exec(pio1, G_DAT0_SM, pio_encode_in(pio_y, 4));
|
||||||
|
|
|
||||||
Loading…
Reference in a new issue